The present invention generally relates to an integrated circuit device having an improved package structure, and particularly to an improvement of a package structure on an integrated circuit chip is mounted and which is used at the time of developing and verifying a program written into the integrated circuit chip or confirming operation of a system having the integrated circuit device. The present invention is suitable for developing and evaluating an application specific integrated circuit digital signal processor (ASIC DSP), microprocessor or the like.
As is well known, an integrated circuit chip such as a digital signal processor and a microprocessor, has a memory which is left open for programming by users so as to construct a desired circuit. Generally, an erasable programmable read only memory (hereinafter simply referred to as an EPROM) is used as a memory provided in an application specific processor.
A piggy back package is a well-known package, and has a socket, which is mounted on top of the package body. The socket has first terminals coupled to terminals provided in the package body, and second terminals to be coupled to a plug having a terminal arrangement identical to that of the second terminals. An integrated circuit chip accommodated in the package body is coupled to a tool such as a debugger and an emulator through the socket, plug and cable. In this state, it is possible to monitor the state of internal memories and registers as exist before and after executing an instruction, for example.
FIGS. 1A, 1B and 1C illustrate a conventional piggy back type package. The illustrated package includes a package body 21, and a leadless chip carrier type socket 31 which is mounted on top of the package body 21. The package body 21 is made up of a plurality of stacked ceramic layers. A semiconductor chip 26, in which an integrated circuit is formed, is provided in a chip mounting layer 22 which is one of the stacked ceramic layers. On the side of the package body 21, facing a printed circuit board on which it is to be mounted, there are provided a plurality of external connection terminals 25 to be connected to wiring lines formed on the printed circuit board. On the same side of the package body 21, there is provided a cap 24 used for hermetically sealing the chip 26. On the other side of the package body 21, there are provided pin receiving members 28, which is to engage with socket pin terminals 32 provided in the socket 31. The socket pin terminals 32 and the corresponding pin receiving members 28 are mutually connected by soldering.
The package body 21 includes conductive patterns 42, which serve as wiring lines or internal connection lines, and are connected to the related external connection terminals 25 and the pin receiving members 28. The internal connection lines 42 extend up to a surface of a wire bonding layer 23. Bonding wires 27 connect the internal connection lines 42 and related bonding pads formed on the surface of the wire bonding layer 23.
FIG. 2 illustrates another conventional piggy back type package. The illustrated package includes a package body 71 having a plurality of stacked ceramic layers into which a silicon semiconductor chip is accommodated. The package body 71 is provided with a plurality of external connection terminals 72 and pin receiving members, with which pin terminals of a socket 81 engage. Each of the external connection terminals 72 is in the form of a pin, which is inserted into a corresponding through hole formed in a printed circuit board.
The above-mentioned packages may be provided with some improvements. For example, an improvement is that the package bodies 21 and 71 are miniaturized in order to enhance the element mounting density. Another improvement is to employ a large size socket to thereby attain an increased number of terminals used for evaluating the chip. Still another improvement is that the outer diameter of the package body 21, 71 is set equal to that of the socket 31, 81 in order to satisfy both the miniaturization of the package body and increase of the size of the socket.
However, the increase of the number of terminals used for the chip evaluation encounters a problem such that the socket projecting outside the package body prevents other electrical circuit elements from being mounted on the same printed circuit board. This leads to a decrease of the element mounting density. Additionally, it is desired that the package body is as small as possible to enhance the element mounting density. From the above-mentioned reasons, it is actually impossible to provide a large number of terminals used for the development and evaluation of integrated circuit chips.
The package illustrated in FIGS. 1A through 1C is designed to visually investigate the contact state of the socket pin terminals 32 and the pin receiving members 28 through a gap between the neighboring socket pin terminals 32. Therefore, an increase of the number of socket pin terminals 32 causes difficulty in the visual investigation. As a result, it becomes impossible to visually investigate a failure of soldering contacts.